In digital assemblies, the power supply voltage is monitored through a voltage monitoring module. If the deviation of the power supply voltage from its setpoint reaches or exceeds a specified threshold value, the voltage monitoring module triggers a reset of the entire digital assembly, called a “Power-On Reset” below, so as to prevent any undefined logic states. Likewise, the entire digital assembly is provided with a Power-On Reset signal during the time the power supply voltage is turned on, which has the effect of keeping the digital assembly from transitioning to its operating state before a defined time or before the power supply voltage reaches a stable state.
For systems on whose fail-safeness certain minimum requirements are placed, it is common to perform a diagnosis or self-test at regular intervals and/or at the user's request during operation by built-in or external mechanisms. This is called “On-Line Diagnosis” in general. It is also desirable to incorporate the voltage monitoring module into this online diagnosis since it is precisely these modules that have a relatively high error probability, i.e., voltage monitoring modules have a relatively high FIT rate—Failure in Time Rate—(failure rate).
If as part of an online diagnosis, the voltage monitoring module is to be tested for-correct functionality, i.e., by issuing a signal for this purpose to an appropriate signal input of the voltage monitoring module, a fluctuation in the power supply voltage is simulated, whereupon the voltage monitoring module produces an active Power-On Reset signal, this Power-On Reset signal likewise results in resetting the entire logic of an assembly as well as the processors contained therein. One of these processors will normally initiate the voltage monitoring test as one test step in the overall diagnosis procedure. However, since this test triggers the same Power-On Reset as is triggered when the device is turned on or during a strong fluctuation in the power supply voltage, it is very difficult for the processor to differentiate whether the assembly has just been turned on, a “true” Power-On Reset, or whether a test of the voltage monitoring module, a “simulated” Power-On Reset, was responsible for the Power-On Reset.
Furthermore, the assembly initialization procedure directly follows a Power-On Reset. This initialization procedure or boot-up of the assembly after a Power-On Reset requires a not insignificant time frame, for example if large memory areas must be formatted or if large amounts of data are loaded from slow, non-volatile memories to the working memory.
Known solutions to this problem make use of a memory register, for example a static RAM memory, that is not erased by a pure Reset without an interruption in voltage, so as to differentiate between a “true” and a “simulated” Power-On Reset. This register is read after every Power-On Reset. There are three different cases:                The “test data template” exists in the memory register. This is the index for a “simulated” Power-On Reset as part of an online diagnosis that is continued at this point.        The “operating data template” exists in the memory register. This is the index for a “true” Reset that, for example, had been triggered by the voltage monitoring module due to a voltage fluctuation or by an assembly Reset.        Neither the “test data template” nor the “operating data template” exists in the memory register. This is the index for a “true” Power-On Reset after the power supply voltage is turned on. The processor now writes the “operating data template” to the register immediately and a normal assembly boot-up follows.        
However, the differentiation of these three cases is not clear-cut all the time, due to physical effects, for example. For example, it has not been established how long a static RAM memory can maintain a data template without an operating voltage. Thus, it is possible that the memory register can still contain the “operating data template” even though the assembly had been shut off for a longer period of time, in some cases for many minutes. Also, cases in which the “test data template” has just been written into the memory register and the Reset is triggered not by the test signal, but by a random voltage fluctuation, cannot be differentiated from cases in which the Reset is triggered by the test signal.